A characterization of signed hypergraphs and its applications to VLSI via minimization and logic synthesis

DOI10.1016/S0166-218X(98)00092-4zbMath0913.68104MaRDI QIDQ1276973

K. Appert

Publication date: 2 February 1999

Published in: Discrete Applied Mathematics (Search for Journal in Brave)

Full work available at URL: http://www.elsevier.com/locate/dam

zbMATH Keywords

signed hypergraph; VLSI optimization problems

Mathematics Subject Classification ID

05C65: Hypergraphs

68R10: Graph theory (including graph drawing) in computer science

68W35: Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.)

Related Items

A Dynamic Programming Algorithm To Test A Signed Graph For Balance, Oriented hypergraphs: introduction and balance, Signed intersection graphs

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