Tight bounds on expected time to add correctly and add mostly correctly

DOI10.1016/0020-0190(94)90031-0zbMath0795.68103MaRDI QIDQ1318774

Mor Harchol, Peter S. Gemmell

Publication date: 4 April 1994

Published in: Information Processing Letters (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0020-0190(94)90031-0

zbMATH Keywords

addition; circuit of AND, OR, and NOT gates

Mathematics Subject Classification ID

68Q25: Analysis of algorithms and problem complexity

68W35: Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.)

Cites Work

• Designing programs that check their work