A multiprocessor architecture combining fine-grained and coarse-grained parallelism strategies

DOI10.1016/0167-8191(94)90003-5zbMath0805.68014OpenAlexW2049972644MaRDI QIDQ1323639

David J. Lilja

Publication date: 1 June 1994

Published in: Parallel Computing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0167-8191(94)90003-5

zbMATH Keywords

instruction-level parallelismmultiprocessorpipeliningfine-grained parallelismcoarse-grained parallelismloop-level parallelismperformance comparisonssuperscalar

Mathematics Subject Classification ID

Network design and communication in computer systems (68M10) Modes of computation (nondeterministic, parallel, interactive, probabilistic, etc.) (68Q10) Mathematical problems of computer architecture (68M07)

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