A systolic design for generating permutations in lexicographic order

DOI10.1016/0167-8191(94)90005-1zbMath0805.68067MaRDI QIDQ1323643

Wei-Ping Lee, Jong-Chuang Tsay

Publication date: 26 January 1995

Published in: Parallel Computing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0167-8191(94)90005-1

zbMATH Keywords

lexicographic order; systolic array; VLSI implementation; systolic algorithm; combinatorial objects; permutation generation

Mathematics Subject Classification ID

68R05: Combinatorics in computer science

05A05: Permutations, words, matrices

68W35: Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.)

68W15: Distributed algorithms

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