Embedding hypercubes and related networks into mesh-connected processor arrays
DOI10.1006/JPDC.1994.1120zbMATH Open0814.68020OpenAlexW2026935668MaRDI QIDQ1345656FDOQ1345656
Authors: Fred S. Annexstein
Publication date: 8 March 1995
Published in: Journal of Parallel and Distributed Computing (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1006/jpdc.1994.1120
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Analysis of algorithms and problem complexity (68Q25) Graph theory (including graph drawing) in computer science (68R10) Mathematical problems of computer architecture (68M07) Network design and communication in computer systems (68M10)
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- Work-preserving emulations of shuffle-exchange networks: An analysis of the complex plane diagram
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- An asymptotic relation between the wirelength of an embedding and the Wiener index
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- On the reconfigurability of embedded loops on hypercubes and its application
- Compressing cube-connected cycles and butterfly networks
- An alternative mapping of 3-D space onto processor arrays
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