Memory design and exploration for low power, embedded systems

DOI10.1023/A:1012227328646MaRDI QIDQ1597546zbMATH OpenOpenAlexFDO

Authors Wen-Tsong Shiue, Chaitali Chakrabarti

Publication date 30 May 2002

Published in Journal of VLSI signal processing systems for signal, image and video technology (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1023/a:1012227328646

zbMATH Keywords

data cachememory design

Mathematics Subject Classification ID

Computer system organization (68M99) Computing methodologies for image processing (68U10) Computing methodologies and applications (68U99) Signal theory (characterization, reconstruction, filtering, etc.) (94A12)

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(8)

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• Area and power reduction of embedded DSP systems using instruction compression and re-configurable encoding
• Dynamic tag reduction for low-power caches in embedded systems with virtual memory

Describes a project that uses

Uses Software

• MediaBench

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