Reducing cache conflicts by multi-level cache partitioning and array elements mapping
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Publication:1604789
DOI10.1023/A:1014982819342zbMath1014.68029MaRDI QIDQ1604789
Chih-Yung Chang, Hsi-Chiuen Chen, Jang-Ping Sheu
Publication date: 8 July 2002
Published in: The Journal of Supercomputing (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1023/a:1014982819342
68M20: Performance evaluation, queueing, and scheduling in the context of computer systems
68M99: Computer system organization