Verification of arithmetic circuits using binary moment diagrams

DOI10.1007/S100090100037MaRDI QIDQ1606802zbMATHOpenAlexWikidataFDO

Authors Randal E. Bryant, Yirng-An Chen

Publication date 25 July 2002

Published in International Journal on Software Tools for Technology Transfer. STTT (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/s100090100037

Mathematics Subject Classification ID

Computing methodologies and applications (68U99) Computer science aspects of computer-aided design (68U07) Network design and communication in computer systems (68M10)

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Cited in

(5)

• Formal Verification of Integer Multiplier Circuits Using Algebraic Reasoning: A Survey
• Polynomial formal verification of multipliers
• Decision diagrams for verification
• Bit-precise verification of discontinuity errors under fixed-point arithmetic
• Incremental column-wise verification of arithmetic circuits using computer algebra

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