Protecting secure ICs against side-channel attacks by identifying and quantifying potential EM and leakage hotspots at simulation stage

DOI10.1007/978-3-030-89915-8_6MaRDI QIDQ2145294zbMATH OpenOpenAlexFDO

Authors D. Poggi, Philippe Maurine, Thomas Ordas, Alexandre Sarafianos

Publication date 17 June 2022

Full work available at URL https://doi.org/10.1007/978-3-030-89915-8_6

zbMATH Keywords

simulationEM side-channel analysissecure IC design

Mathematics Subject Classification ID

Cryptography (94A60)

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Cites work

• scientific article; zbMATH DE number 1759297 (Why is no real title available?)
• scientific article; zbMATH DE number 1878336 (Why is no real title available?)
• scientific article; zbMATH DE number 1418307 (Why is no real title available?)
• A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions
• A Unified Framework for the Analysis of Side-Channel Key Recovery Attacks
• Cryptographic Hardware and Embedded Systems - CHES 2004

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(2)

• On-chip evaluation of voltage drops and fault occurrence induced by Si backside EM injection
• EM attack is non-invasive? - design methodology and validity verification of EM attack sensor

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