Transient and steady-state performance modeling of parallel processors

DOI10.1016/S0307-904X(98)10062-8zbMATH Open1428.68041OpenAlexW2067439680MaRDI QIDQ2284147FDOQ2284147

Authors: Marlin H. Mickle 

Publication date: 14 January 2020

Published in: Applied Mathematical Modelling (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/s0307-904x(98)10062-8

Recommendations

• scientific article; zbMATH DE number 800569
• Realistic parallel performance estimation
• MODELING METHODOLOGY FOR PERFORMANCE EVALUATION OF PARALLEL ARCHITECTURES A CASE STUDY, LCAP
• Performance evaluation of the IMPS multiprocessor system
• scientific article; zbMATH DE number 3917674

zbMATH Keywords

parallel processingmemory contentionperformance modelingassembly languagecache memoryinstruction set architecture

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Mathematical problems of computer architecture (68M07)

Cites Work

• Title not available (Why is that?)

Cited In (7)

• Transient solution of a two-processor heterogeneous system
• The Science of Computer Benchmarking
• Title not available (Why is that?)
• Analysis of Initial Transient Deletion for Parallel Steady-State Simulations
• Title not available (Why is that?)
• \(f_{1/2}:\) A parameter to characterize memory and communication bottlenecks
• Piecewise linear models of processor utilization

This page was built for publication: Transient and steady-state performance modeling of parallel processors

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q2284147)