Theoretical model of computation and algorithms for FPGA-based hardware accelerators
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Publication:2327481
DOI10.1007/978-3-030-14812-6_18OpenAlexW2962815510MaRDI QIDQ2327481
Jakub Tětek, Václav Končický, Martin Hora
Publication date: 15 October 2019
Full work available at URL: https://arxiv.org/abs/1807.03611
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