A hardware Memetic accelerator for VLSI circuit partitioning

DOI10.1016/J.COMPELECENG.2007.02.003MaRDI QIDQ2371966zbMATH OpenOpenAlexFDO

Authors Stephen Coe, Shawki Areibi, Medhat Moussa

Publication date 10 July 2007

Published in Computers and Electrical Engineering (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/j.compeleceng.2007.02.003

zbMATH Keywords

genetic algorithmsFPGAmemetic algorithmscircuit partitioninghardware acceleratorhandel-C

Mathematics Subject Classification ID

Computer science aspects of computer-aided design (68U07) Computer system organization (68M99)

Cited in

(3)

• scientific article; zbMATH DE number 1974038 (Why is no real title available?)
• A multiple-population evolutionary approach to gate matrix layout
• scientific article; zbMATH DE number 2159393 (Why is no real title available?)

Describes a project that uses

Uses Software

• Handel-C

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