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Provably-correct hardware compilation tools based on pass separation techniques

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Publication:2432229
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DOI10.1007/S00165-005-0075-8zbMATH Open1103.68455OpenAlexW2038833945MaRDI QIDQ2432229FDOQ2432229


Authors: Steve McKeever, Wayne Luk Edit this on Wikidata


Publication date: 25 October 2006

Published in: Formal Aspects of Computing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s00165-005-0075-8




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zbMATH Keywords

flattening procedurerelative placement methodstructural VHDL


Mathematics Subject Classification ID

Theory of compilers and interpreters (68N20)



Cited In (3)

  • Title not available (Why is that?)
  • Title not available (Why is that?)
  • Verification of FPGA layout generators in higher-order logic





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