An astatic phase-locked system for digital signal processors: circuit design and stability

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Publication:2487550

DOI10.1007/S10513-005-0064-7zbMATH Open1075.94028OpenAlexW2081968389MaRDI QIDQ2487550FDOQ2487550


Authors: S. M. Seledzhi, G. A. Leonov Edit this on Wikidata


Publication date: 8 August 2005

Published in: Automation and Remote Control (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s10513-005-0064-7




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