Shaped lattice graphs as models of the multiprocessor computer systems

DOI10.1007/S10513-005-0078-1zbMATH Open1088.68677OpenAlexW2033153076MaRDI QIDQ2487565FDOQ2487565

Authors: P. P. Parkhomenko 

Publication date: 8 August 2005

Published in: Automation and Remote Control (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s10513-005-0078-1

Recommendations

• Graphs for small multiprocessor interconnection networks
• Well-suited multiprocessor topologies with small number of processors
• Some new models for multiprocessor interconnection networks
• Construction of Hamiltonian circuits in Cayley graphs modeling multiprocessing computer systems
• MULTIPROCESSOR INTERCONNECTION NETWORKS WITH SMALL TIGHTNESS

Mathematics Subject Classification ID

Graph theory (including graph drawing) in computer science (68R10) Network design and communication in computer systems (68M10)

Cites Work

• Arrangement graphs: A class of generalized star graphs
• Embedding a ring in a hypercube with both faulty links and faulty nodes
• Title not available (Why is that?)
• Classification of the Hamiltonian cycles in binary hypercubes

Cited In (3)

• Lattice computers for approximating Euclidean space
• Consideration of lattice graphs applying to investigation of the multipipeline calculations model
• Combinatorial methods for constructing bipartite uniform minimal quasicomplete graphs (symmetrical block designs)

This page was built for publication: Shaped lattice graphs as models of the multiprocessor computer systems

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q2487565)