When cache blocking of sparse matrix vector multiply works and why
DOI10.1007/S00200-007-0038-9zbMATH Open1122.65043OpenAlexW2162630236MaRDI QIDQ2642897FDOQ2642897
Authors: Rajesh Nishtala, Richard Vuduc, James Demmel, Katherine A. Yelick 
Publication date: 6 September 2007
Published in: Applicable Algebra in Engineering, Communication and Computing (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s00200-007-0038-9
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Cites Work
Cited In (11)
- Estimating the effect of indices compression in the CSR-like data storage formats for matrix-vector multiplications and solving linear systems
- Parallel Processing and Applied Mathematics
- Parallel symmetric sparse matrix-vector product on scalar multi-core CPUs
- Cache optimization and performance modeling of batched, small, and rectangular matrix multiplication on Intel, AMD, and Fujitsu processors
- Cache blocking strategies applied to flux reconstruction
- A Cache-Oblivious Sparse Matrix–Vector Multiplication Scheme Based on the Hilbert Curve
- Numerical Analysis and Its Applications
- When cache blocking of sparse matrix vector multiply works and why
- Communication lower bounds and optimal algorithms for numerical linear algebra
- Parallel Processing and Applied Mathematics
- Modeling and improving locality for the sparse-matrix–vector product on cache memories
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