Point-to-point connectivity between neuromorphic chips using address events
DOI10.1109/82.842110zbMATH Open1003.94538OpenAlexW2163288878MaRDI QIDQ2732946FDOQ2732946
Authors: Kwabena Boahen 
Publication date: 4 September 2001
Published in: IEEE Transactions on Circuits and Systems. II: Analog and Digital Signal Processing (Search for Journal in Brave)
Full work available at URL: https://repository.upenn.edu/cgi/viewcontent.cgi?article=1006&context=be_papers
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connectivityVLSI circuitsdecodingencodingspiking neuronsanalog-digital systemsarbitered channelasynchronous logic synthesisinterchip communicationneuromorphic chipsvirtual wiring
Learning and adaptive systems in artificial intelligence (68T05) Analytic circuit theory (94C05) Mathematical problems of computer architecture (68M07) Channel models (including quantum) in information and communication theory (94A40)
Cited In (6)
- STICK: spike time interval computational kernel, a framework for general purpose computation using neurons, precise timing, delays, and synchrony
- Coupling an aVLSI Neuromorphic Vision Chip to a Neurotrophic Model of Synaptic Plasticity: The Development of Topography
- ORIENTED SPATIAL PATTERN FORMATION IN A FOUR LAYER CMOS CELLULAR NEURAL NETWORK
- Hardware-amenable structural learning for spike-based pattern classification using a simple model of active dendrites
- Scalable Hybrid Computation with Spikes
- A Preference for Phase-Based Disparity in a Neuromorphic Implementation of the Binocular Energy Model
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