DesynchLRU: an efficient page replacement algorithm with desynchronized cache and RAM

zbMATH Open1245.68035MaRDI QIDQ2909024FDOQ2909024

Chowdhury Sayeed Hyder, Md. Raqibul Hasan, M. Sohel Rahman

Publication date: 29 August 2012

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zbMATH Keywords

cachepage replacementvirtual memorymain memorypage fault

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Nonnumerical algorithms (68W05)

Cited In (2)

• CLOCK-DWF: A Write-History-Aware Page Replacement Algorithm for Hybrid PCM and DRAM Memory Architectures
• DesynchLRU

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