Low-Cost and High-Reduction Approaches for Power Droop During Launch-On-Shift Scan-Based Logic BIST

DOI10.1109/TC.2015.2490058MaRDI QIDQ2985347zbMATH OpenOpenAlexFDO

Authors Martin Omaña, Daniele Rossi, Edda Beniamino, Cecilia Metra, Chandrasekharan Tirumurti, Rajesh Galivanche

Publication date 16 May 2017

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/tc.2015.2490058

Mathematics Subject Classification ID

Reliability, testing and fault tolerance of networks and computer systems (68M15)

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