A partition-based IP protection algorithm for analog circuits

DOI10.15943/J.CNKI.FDXB-JNS.2015.05.003MaRDI QIDQ2992671zbMATH OpenFDO

Authors Min Xie, Fan Yang, Xuan Zeng

Publication date 10 August 2016

zbMATH Keywords

partitionmax-cutanalog circuitsIP protection

Mathematics Subject Classification ID

Analytic circuit theory (94C05) Applications of graph theory to circuits and networks (94C15)

Recommendations

• A trusted host's authentication access and control model faced on user action
• scientific article; zbMATH DE number 1952757
• A technique using PUFs for protecting circuit layout designs against reverse engineering
• A survey of VLSI circuit partitioning algorithms
• Support vector machines for improved IP detection with soft physical hash functions

Cited in

(1)

• A trusted host's authentication access and control model faced on user action

This page was built for publication: A partition-based IP protection algorithm for analog circuits

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q2992671)