Expressiveness of verifiable hierarchical clock systems
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Publication:3005130
DOI10.1080/03081070701794876zbMath1222.68114OpenAlexW2103499994MaRDI QIDQ3005130
Moon Ho Hwang, Bernard P. Zeigler
Publication date: 7 June 2011
Published in: International Journal of General Systems (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1080/03081070701794876
Formal languages and automata (68Q45) Discrete event control/observation systems (93C65) Specification and verification (program logics, model checking, etc.) (68Q60) Models and methods for concurrent and distributed computing (process algebras, bisimulation, transition nets, etc.) (68Q85)
Uses Software
Cites Work
- An environment for DEVS-based multiformalism simulation in common lisp/CLOS
- Model-checking in dense real-time
- A theory of timed automata
- SYSTEM THEORETIC FORMALISMS FOR COMBINED DISCRETE-CONTINUOUS SYSTEM SIMULATION
- Discrete Event Simulation of Hybrid Systems
- Analysis of timed systems using time-abstracting bisimulations
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