Implementation of NOR Gate by a Chaotic Chua's Circuit
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Publication:3046563
DOI10.1142/S0218127403008053zbMATH Open1046.94518OpenAlexW2086805106MaRDI QIDQ3046563FDOQ3046563
Authors:
Publication date: 12 August 2004
Published in: International Journal of Bifurcation and Chaos in Applied Sciences and Engineering (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1142/s0218127403008053
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Cites Work
Cited In (14)
- Construction of a Chaotic Computer Chip
- Design and implementation of dynamic logic gates and R-S flip-flop using quasiperiodically driven Murali-Lakshmanan-Chua circuit
- Qualitative models and experimental investigation of chaotic NOR gates and set/reset flip-flops
- Implementation of dynamic dual input multiple output logic gate via resonance in globally coupled Duffing oscillators
- Chaotic synchronization of two mutually coupled semiconductor lasers for optoelectronic logic gates
- Vibrational resonance and implementation of dynamic logic gate in a piecewise-linear Murali-Lakshmanan-Chua circuit
- Chaos computing: a unified view
- Reconfigurable chaotic logic gates based on novel chaotic circuit
- Discrete dynamical modeling and analysis of the \(R-S\) flip-flop circuit
- Chaos computing: experimental realization of NOR gate using a simple chaotic circuit
- Chaotic maps and pattern recognition---the XOR problem
- Threshold voltage dynamics of chaotic RS flip-flops
- Harnessing piecewise-linear systems to construct dynamic logic architecture
- EXPERIMENTAL REALIZATION OF A RECONFIGURABLE THREE INPUT, ONE OUTPUT LOGIC FUNCTION BASED ON A CHAOTIC CIRCUIT
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