One-dimensional logic gate assignment and interval graphs

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Publication:3050329

DOI10.1109/TCS.1979.1084695zbMATH Open0414.94052OpenAlexW2089651609WikidataQ59445248 ScholiaQ59445248MaRDI QIDQ3050329FDOQ3050329


Authors: Tatsuo Ohtsuki, Hajimu Mori, Ernest S. Kuh, Toshinobu Kashiwabara, Toshio Fujisawa Edit this on Wikidata


Publication date: 1979

Published in: IEEE Transactions on Circuits and Systems (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/tcs.1979.1084695








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