Reducing clocks in timed automata while preserving bisimulation
DOI10.1007/978-3-662-44584-6_36zbMATH Open1417.68102arXiv1404.6613OpenAlexW325265439MaRDI QIDQ3190141FDOQ3190141
Authors: Shibashis Guha, Chinmay Narayan, S. Arun-Kumar
Publication date: 15 September 2014
Published in: CONCUR 2014 – Concurrency Theory (Search for Journal in Brave)
Full work available at URL: https://arxiv.org/abs/1404.6613
Recommendations
Formal languages and automata (68Q45) Specification and verification (program logics, model checking, etc.) (68Q60) Models and methods for concurrent and distributed computing (process algebras, bisimulation, transition nets, etc.) (68Q85)
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- Clock allocation in timed automata and graph colouring
- Reducing quasi-equal clocks in networks of timed automata
- Untangling the graphs of timed automata to decrease the number of clocks
- CONCUR 2005 – Concurrency Theory
- An efficient customized clock allocation algorithm for a class of timed automata
- Automated verification for real-time systems. Via implicit clocks and an extended Antimirov algorithm
- Biased clocks: a novel approach to improve the ability to perform predicate detection with \(O(1)\) clocks
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