scientific article; zbMATH DE number 3843669

MaRDI QIDQ3313787zbMATH OpenFDO

Authors John Savage

Publication date 1983

zbMATH Keywords

level graphslinear time algorithm for chip layout from Boolean equationssilicon compilation problemSLAPtime efficient channel router

Mathematics Subject Classification ID

Planar graphs; geometric and topological aspects of graph theory (05C10) Graph theory (including graph drawing) in computer science (68R10) Applications of graph theory to circuits and networks (94C15)

Recommendations

• Multilevel graph embedding
• scientific article; zbMATH DE number 434479
• Level graphs and approximate shortest path algorithms
• On the complexity of graph embeddings
• Algorithmic graph embeddings
• scientific article; zbMATH DE number 51713
• Embeddings of graphs
• A satisfiability-based approach for embedding generalized tanglegrams on level graphs
• Graph embeddings and simplicial maps
• scientific article; zbMATH DE number 1696626

Cited in

(1)

• A parallel algorithm for channel routing

This page was built for publication:

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q3313787)