The M/G/1 processor sharing queue as the almost sure limit of feedback queues
DOI10.2307/3214834zbMATH Open0726.60093OpenAlexW2086477984MaRDI QIDQ3350437FDOQ3350437
Authors: Jacques Resing, Gerard Hooghiemstra, Michael Keane 
Publication date: 1990
Published in: Journal of Applied Probability (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.2307/3214834
Recommendations
weak convergenceperformance analysisprocessor sharingcoupling techniquestime sharingcustomer's steady-state sojourn time distribution
Queues and service in operations research (90B22) Queueing theory (aspects of probability theory) (60K25)
Cited In (15)
- Processor sharing: a survey of the mathematical theory
- The \(M/G/1\) processor-sharing queue with disasters
- The M/G/1 processor-sharing model: Transient behavior
- A \(BMAP/PH/1\) queue with feedback operating in a random environment
- Rejoinder on: ``Queueing models for the analysis of communication systems
- Interoutput times in processor sharing queues with feedback
- On a heavy traffic limit theorem for the M/G/1 processor-sharing queue
- The \(M/G/1\) queue with processor sharing and its relation to a feedback queue
- Analysis of a Markovian feedback queue with multi-class customers and its application to the weighted round-robin queue
- Title not available (Why is that?)
- Using the \(M/G/1\) queue under processor sharing for exact simulation of queues
- Mathematical problems in the theory of processor-sharing queueing systems
- \(M/G/1/MLPS\) compared to \(M/G/1/PS\)
- Power series approximations for two-class generalized processor sharing systems
- On stochastic bounds for monotonic processor sharing networks
This page was built for publication: The M/G/1 processor sharing queue as the almost sure limit of feedback queues
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q3350437)
