Shortest paths and Steiner trees in VLSI routing
zbMATH Open1143.05047MaRDI QIDQ3520140FDOQ3520140
Authors: Sven Peyer 
Publication date: 20 August 2008
Full work available at URL: http://d-nb.info/987223828/34
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- scientific article; zbMATH DE number 219265
shortest pathsroutingSteiner treesVLSIDijkstra's algorithmrectilinear obstaclesvery-large-scale integrationaugmented Hanan gridBonnRoutedisjoint wire connectionsrectilinear Steiner minimum treeRSMTshortest rectilinear Steiner treeVLSI routing problem
Applications of graph theory (05C90) Trees (05C05) Graph algorithms (graph-theoretic aspects) (05C85) Graph theory (including graph drawing) in computer science (68R10) Extremal problems in graph theory (05C35) Planar graphs; geometric and topological aspects of graph theory (05C10) Paths and cycles (05C38) Network design and communication in computer systems (68M10) Software, source code, etc. for problems pertaining to computer science (68-04)
Cited In (13)
- A deep-submicron Steiner tree.
- A branch-and-price algorithm for switch-box routing
- Rectilinear group Steiner trees and applications in VLSI design
- VLSI routing in polynomial time
- Title not available (Why is that?)
- Faster goal-oriented shortest path search for bulk and incremental detailed routing
- Preprocessing Steiner problems from VLSI layout
- Faster goal-oriented shortest path search for bulk and incremental detailed routing
- Rectilinear paths with minimum segment lengths
- A generalization of Dijkstra's shortest path algorithm with applications to VLSI routing
- A PSO-based timing-driven octilinear Steiner tree algorithm for VLSI routing considering bend reduction
- Approximation of rectilinear Steiner trees with length restrictions on obstacles.
- Steiner trees with bounded RC-delay
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