scientific article; zbMATH DE number 5353409

MaRDI QIDQ3528942zbMATH OpenFDO

Authors M. Karra Ch., M. P. Bekakos, Igor Ž. Milovanović, E. I. Milovanović

Publication date 17 October 2008

zbMATH Keywords

systolic processing

Mathematics Subject Classification ID

Numerical algorithms for specific classes of architectures (65Y10) Mathematical problems of computer architecture (68M07) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

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Cited in

(9)

• High level synthesis FPGA implementation of the Jacobi algorithm to solve the eigen problem
• Synthesis of a unidirectional systolic array for matrix-vector multiplication
• Mapping full‐systolic arrays for matrix product on XILINX's XC4000(E,EX) FPGAs
• Towards an FPGA solver for the PageRank eigenvector problem
• Energy-efficient matrix multiplication on FPGAs
• An FPGA implementation of a multi-comparand multi-search associative processor
• Real-time medical diagnosis on a multiple FPGA-based system
• Accelerating matrix product on reconfigurable hardware for signal processing
• Parallel Processing and Applied Mathematics

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