Architecture and Implementation of an Interpolation Processor for Soft-Decision Reed–Solomon Decoding

DOI10.1109/TVLSI.2007.893609zbMath1318.94107DBLPjournals/tvlsi/GrossKG07WikidataQ59767880 ScholiaQ59767880MaRDI QIDQ3549245

P. Glenn Gulak, Warren J. Gross, Frank R. Kschischang

Publication date: 21 December 2008

Published in: IEEE Transactions on Very Large Scale Integration (VLSI) Systems (Search for Journal in Brave)

Mathematics Subject Classification ID

Decoding (94B35)

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