A FPGA implementation of a phase locked loop for DC motor control

MaRDI QIDQ3574889zbMATH OpenFDO

Authors Bogdan Alecsa, Alexandru Onea

Publication date 2 July 2010

zbMATH Keywords

ADPLLFPGAmotor controlPLL

Mathematics Subject Classification ID

Control/observation systems involving computers (process control, etc.) (93C83)

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(4)

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