Decomposition-based logic synthesis for PAL-based CPLDs

DOI10.2478/V10006-010-0027-1MaRDI QIDQ3587067zbMATH OpenOpenAlexFDO

Authors Adam Opara, Dariusz Kania

Publication date 2 September 2010

Published in International Journal of Applied Mathematics and Computer Science (Search for Journal in Brave)

Full work available at URL https://eudml.org/doc/207993

zbMATH Keywords

BDDCPLDdecompositionlogic optimizationtechnology mapping

Mathematics Subject Classification ID

Analytic circuit theory (94C05)

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Cites work

• Chromatic graph theory
• Functional decomposition with application to FPGA synthesis
• Graph-Based Algorithms for Boolean Function Manipulation
• scientific article; zbMATH DE number 3902554 (Why is no real title available?)
• scientific article; zbMATH DE number 846270 (Why is no real title available?)

Cited in

(7)

• Improving characteristics of LUT-based mealy FSMs
• Selection of search strategies for solving 3-SAT problems
• Synthesis of digital systems implemented with programmable logic devices, using decomposition algorithms
• Comparative study for synthesis of digital systems using decomposition algorithms
• Efficient technology mapping method for PAL-based devices
• scientific article; zbMATH DE number 1955868 (Why is no real title available?)
• An efficient interpolation-based projected sum of product decomposition via genetic algorithm

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