Applying Logic Synthesis for Speeding Up SAT
From MaRDI portal
Publication:3612472
DOI10.1007/978-3-540-72788-0_26zbMath1214.68351MaRDI QIDQ3612472
Alan Mishchenko, Niklas Een, Niklas Sörensson
Publication date: 10 March 2009
Published in: Theory and Applications of Satisfiability Testing – SAT 2007 (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/978-3-540-72788-0_26
68Q25: Analysis of algorithms and problem complexity
68T20: Problem solving in the context of artificial intelligence (heuristics, search strategies, etc.)
Related Items
Computing Storyline Visualizations with Few Block Crossings, Mining definitions in Kissat with Kittens, Simulating circuit-level simplifications on CNF, SAT solver management strategies in IC3: an experimental approach, Solving SAT (and MaxSAT) with a quantum annealer: foundations, encodings, and preliminary results, Heuristic NPN Classification for Large Functions Using AIGs and LEXSAT, Synthesis of Domain Specific CNF Encoders for Bit-Vector Solvers, SAT-Based Model Checking without Unrolling, SAT-Based Model Checking
Uses Software