A Tree Representation of Combinational Networks

DOI10.1109/TC.1983.1676224zbMath0512.94028OpenAlexW2090930733MaRDI QIDQ3657932

Zvonko G. Vranesic, Kuang-Wei Chiang

Publication date: 1983

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/tc.1983.1676224

zbMATH Keywords

fault detectiontestinglogic circuitscombinational network model

Mathematics Subject Classification ID

Fault detection; testing in circuits and networks (94C12) Applications of graph theory to circuits and networks (94C15)

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