Systolic super summation

DOI10.1109/12.2205zbMATH Open0647.65032OpenAlexW2080094880MaRDI QIDQ3792151FDOQ3792151

Authors: Peter R. Cappello, Willard L. Miranker 

Publication date: 1988

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/12.2205

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zbMATH Keywords

hardwarefloating-point arithmeticsystolic arrayinner productsscientific computationsuper summationsystolic super summer

Mathematics Subject Classification ID

Computation of special functions and constants, construction of tables (65D20) Symbolic computation and algebraic computation (68W30) Roundoff error (65G50)

Cited In (4)

• Title not available (Why is that?)
• A bit-serial floating-point unit for a massively parallel system on a chip
• A circuit for exact summation of floating-point numbers
• Mixed Precision Block Fused Multiply-Add: Error Analysis and Application to GPU Tensor Cores

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