Publication:4000016
From MaRDI portal
zbMath0757.94024MaRDI QIDQ4000016
Publication date: 18 September 1992
VLSI circuits; Steiner tree; timing constraints; VLSI floorplanning; block sizing; global wiring optimization; VLSI block layout
68R10: Graph theory (including graph drawing) in computer science
94-02: Research exposition (monographs, survey articles) pertaining to information and communication theory
94C15: Applications of graph theory to circuits and networks
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