Optimal packet sizes in virtual circuit computer networks

DOI10.1016/0169-7552(92)90086-6MaRDI QIDQ4017613zbMATH OpenOpenAlexFDO

Authors Claude Évéquoz, C. Tropper

Publication date 16 January 1993

Published in Computer Networks and ISDN Systems (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/0169-7552(92)90086-6

zbMATH Keywords

heuristicsmessage delayoptimal packet sizesimulationvirtual circuits

Mathematics Subject Classification ID

Network design and communication in computer systems (68M10) Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)

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