scientific article; zbMATH DE number 139808

MaRDI QIDQ4028137zbMATH OpenFDO

Authors Dominique Borrione, Laurence Pierre, Ashraf Salem

Publication date 28 March 1993

zbMATH Keywords

formal verification environmentVHDL architectures

Mathematics Subject Classification ID

Fault detection; testing in circuits and networks (94C12)

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Cited in

(3)

• PREVAIL
• Interaction with the Boyer-Moore theorem prover: A tutorial study using the arithmetic-geometric mean theorem
• Reveal: A Formal Verification Tool for Verilog Designs

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