Publication:4220624

zbMath0914.68028MaRDI QIDQ4220624

Vivek Sagdeo

Publication date: 26 November 1998

zbMATH Keywords

semantics; logic synthesis; Verilog; standard delay format; verilog

Mathematics Subject Classification ID

68-01: Introductory exposition (textbooks, tutorial papers, etc.) pertaining to computer science

68N15: Theory of programming languages

68Q55: Semantics in the theory of computing

94C30: Applications of design theory to circuits and networks

68-04: Software, source code, etc. for problems pertaining to computer science

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