A reconfigurable analog VLSI neural network architecture with non-linear synapses

DOI10.1002/(SICI)1097-007X(199805/06)26:3%3C307::AID-CTA14%3E3.0.CO;2-5MaRDI QIDQ4226496zbMATH OpenOpenAlexFDO

Authors

Publication date 22 June 1999

Full work available at URL https://doi.org/10.1002/(sici)1097-007x(199805/06)26:3%3C307::aid-cta14%3E3.0.co;2-5

zbMATH Keywords

VLSI neural network architecture

Mathematics Subject Classification ID

Learning and adaptive systems in artificial intelligence (68T05) Neural networks for/in biological studies, artificial life and related topics (92B20) Circuits, networks (94C99)

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(8)

• Analog VLSI circuits for short-term dynamic synapses
• A systematic method for configuring VLSI networks of spiking neurons
• Classification of Correlated Patterns with a Configurable Analog VLSI Neural Network of Spiking Neurons and Self-Regulating Plastic Synapses
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• Current-mode programmable piecewise-linear neural synapses
• A One-Dimensional Analog VLSI Implementation for Nonlinear Real-Time Signal Preprocessing

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