VLSI implementations of number theoretic techniques in signal processing

DOI10.1016/0167-9260(93)90026-9zbMATH Open0805.68071OpenAlexW1971959801MaRDI QIDQ4294512FDOQ4294512

Authors: Graham A. Jullien, Neil M. Wigley, W. C. Miller 

Publication date: 15 May 1994

Published in: Integration (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0167-9260(93)90026-9

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zbMATH Keywords

arithmetic circuitsdynamic logicpolynomial ringsresidue number systemsbit-level systolic arraysinner product computationspipelined computationreal-time digital signal processingVLSI signal processors

Mathematics Subject Classification ID

Circuits, networks (94C99) Miscellaneous applications of number theory (11Z05) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

Cited In (5)

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• Sorter-Based Arithmetic Circuits for Sigma-Delta Domain Signal Processing—Part II: Multiplication and Algebraic Functions
• VLSI implementation of area-efficient truncated modified booth multiplier for signal processing applications
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