Publication:4306266
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DOI<587::AID-NAV3220410502>3.0.CO;2-Q 10.1002/1520-6750(199408)41:5<587::AID-NAV3220410502>3.0.CO;2-QzbMath0809.90072MaRDI QIDQ4306266
Moshe Dror, Asoo J. Vakharia, Ronald G. Askin
Publication date: 28 March 1995
heuristic; precedence constraints; open-shop scheduling; parallel processor scheduling; printed circuit board assembly system
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