On VLSI layouts of the star graph and related networks

DOI10.1016/0167-9260(94)90021-3zbMATH Open0813.94026OpenAlexW1998306675MaRDI QIDQ4322467FDOQ4322467

Ondrej Sýkora, Imrich Vrt'o

Publication date: 30 May 1995

Published in: Integration (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0167-9260(94)90021-3

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zbMATH Keywords

star graphpancake graphcrossing numbersVLSI layouts

Mathematics Subject Classification ID

Applications of graph theory (05C90) Applications of graph theory to circuits and networks (94C15) Network design and communication in computer systems (68M10) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

Cited In (10)

• Biplanar crossing numbers. II. Comparing crossing numbers and biplanar crossing numbers using the probabilistic method
• VLSI layouts of complete graphs and star graphs
• VLSI layout of Benes networks
• Planar crossing numbers of graphs of bounded genus
• Crossing number, pair-crossing number, and expansion
• Bisection width of transposition graphs
• Algorithms for the fixed linear crossing number problem
• Title not available (Why is that?)
• Orthogonal Tree Decompositions of Graphs
• Long edges in the layouts of shuffle-exchange and cube-connected cycles graphs

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