On VLSI layouts of the star graph and related networks

DOI10.1016/0167-9260(94)90021-3MaRDI QIDQ4322467zbMATH OpenOpenAlexFDO

Authors Ondrej Sýkora, Imrich Vrt'o

Publication date 30 May 1995

Published in Integration (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/0167-9260(94)90021-3

zbMATH Keywords

star graphpancake graphcrossing numbersVLSI layouts

Mathematics Subject Classification ID

Applications of graph theory (05C90) Applications of graph theory to circuits and networks (94C15) Network design and communication in computer systems (68M10) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

Recommendations

• VLSI layouts of complete graphs and star graphs
• scientific article; zbMATH DE number 3914116
• A framework for solving VLSI graph layout problems
• scientific article; zbMATH DE number 88981
• scientific article; zbMATH DE number 3918404
• The VLSI Complexity of Selected Graph Problems
• scientific article; zbMATH DE number 3917694
• Solving Undirected Graph Problems on VLSI
• scientific article; zbMATH DE number 2040828

Cited in

(10)

• Orthogonal tree decompositions of graphs
• Biplanar crossing numbers. II. Comparing crossing numbers and biplanar crossing numbers using the probabilistic method
• VLSI layouts of complete graphs and star graphs
• Planar crossing numbers of graphs of bounded genus
• VLSI layout of Benes networks
• Crossing number, pair-crossing number, and expansion
• Bisection width of transposition graphs
• Algorithms for the fixed linear crossing number problem
• scientific article; zbMATH DE number 88981 (Why is no real title available?)
• Long edges in the layouts of shuffle-exchange and cube-connected cycles graphs

This page was built for publication: On VLSI layouts of the star graph and related networks

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q4322467)