Regular layouts of butterfly networks

DOI10.1016/0167-9260(94)90003-5MaRDI QIDQ4332005zbMATH OpenOpenAlexFDO

Authors Jörg Keller

Publication date 27 February 1997

Published in Integration (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/0167-9260(94)90003-5

zbMATH Keywords

Parallel architecturesInterconnection networkButterfly networkNetwork layout

Mathematics Subject Classification ID

Network design and communication in computer systems (68M10)

Recommendations

• A tight layout of the butterfly network
• Reduction of network cost and wiring in Ranade's butterfly routing
• Optimal emulations by butterfly-like networks
• Optimal embeddings of butterfly-like graphs in the hypercube
• VLSI layout of Benes networks

Cited in

(4)

• Laying out the interconnection network of the transpose bijection
• VLSI layout of Benes networks
• Mapping Cycles and Trees on Wrap-Around Butterfly Graphs
• Reduction of network cost and wiring in Ranade's butterfly routing

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