Circuit level decomposition of networks with nullors for symbolic analysis
From MaRDI portal
Publication:4338099
DOI10.1109/81.331521zbMATH Open0868.94057OpenAlexW2134776239MaRDI QIDQ4338099FDOQ4338099
Authors: Sin-Min Chang, Gregory M. Wierzba
Publication date: 17 August 1997
Published in: IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1109/81.331521
Recommendations
- Nullor equivalents of active devices for symbolic circuit analysis
- Symbolic analyzer for large lumped and distributed networks
- Unified treatment of subnetworks in symbolic analysis of linear electric circuits and systems
- Symbolic analysis of analog and digital circuits
- A comparison of interval methods in symbolic circuit analysis applications
- Symbolic and semisymbolic analysis of electronic circuit in Maple
- scientific article; zbMATH DE number 1106016
- A decomposition scheme for the analysis of fault trees and other combinatorial circuits
Cited In (4)
- Using nullors to analyse linear networks
- Unified treatment of subnetworks in symbolic analysis of linear electric circuits and systems
- TIME DOMAIN DIAKOPTIC ANALYSIS BASED ON REDUCED-ORDER STATE EQUATIONS
- Multiple-level circuit solutions to the circuit non-decomposability problem of the set-theoretic modified reconstructability analysis (MRA)
This page was built for publication: Circuit level decomposition of networks with nullors for symbolic analysis
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q4338099)