A parallel fixed-point predictive controller
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DOI<415::AID-ACS416>3.0.CO;2-J 10.1002/(SICI)1099-1115(199708)11:5<415::AID-ACS416>3.0.CO;2-JzbMath0887.93018MaRDI QIDQ4361280
Jiří Kadlec, F. M. F. Gaston, George W. Irwin
Publication date: 5 May 1998
Full work available at URL: https://doi.org/10.1002/(sici)1099-1115(199708)11:5<415::aid-acs416>3.0.co;2-j
regularization; normalization; parallel implementation; systolic array; VLSI implementation; a priori information; predictive adaptive control
93B51: Design techniques (robust design, computer-aided design, etc.)
65Y05: Parallel numerical computation
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