Bit-level systolic array for fast exponentiation in GF(2/sup m/)

DOI10.1109/12.293263MaRDI QIDQ4419735zbMATH OpenOpenAlexFDO

Authors Chin-Liang Wang

Publication date 1994

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/12.293263

zbMATH Keywords

finite field exponentiationlimit field multiplicationVLSI

Mathematics Subject Classification ID

Parallel algorithms in computer science (68W10) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

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Cited in

(6)

• More efficient systolic arrays for multiplication in GF\((2^m)\) using LSB first algorithm with irreducible polynomials and trinomials
• scientific article; zbMATH DE number 1617929 (Why is no real title available?)
• New systolic arrays for C+AB/sup 2/, inversion, and division in GF(2/sup m/)
• Parallel Processing and Applied Mathematics
• A VLSI design for computing exponentiations in GF(2/sup m/) and its application to generate pseudorandom number sequences
• Computational Science and Its Applications – ICCSA 2004

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