scientific article; zbMATH DE number 1751933

MaRDI QIDQ4533056zbMATH OpenFDO

Authors Remigiusz Wiśniewski, Arkadiusz Bukowiec, Marek Węgrzyn

Publication date 6 June 2002

zbMATH Keywords

design verificationhardware accelerationhardware simulation

Mathematics Subject Classification ID

Computer system organization (68M99)

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Cited in

(2)

• Hardware-in-the-loop simulations for FPGA-based digital control design
• Cycle-based algorithm used to accelerate VHDL simulation

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