scientific article; zbMATH DE number 1753953
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Publication:4533745
zbMATH Open0986.68565MaRDI QIDQ4533745FDOQ4533745
Peter Grun, Nikil Dutt, Alex Nicolau
Publication date: 11 June 2002
Full work available at URL: http://link.springer.de/link/service/series/0558/bibs/2107/21070147
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Cited In (6)
- Architecture technique trade-offs using mean memory delay time
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- Improving effective bandwidth through compiler enhancement of global cache reuse
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- Improving memory traffic by assembly-level exploitation of reuses for vector registers
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