Feasibility analysis for robustness quantification by symbolic model checking

DOI10.1007/S10703-011-0121-5MaRDI QIDQ453480zbMATH OpenOpenAlexFDO

Authors Souheib Baarir, Cécile Braunstein, Emmanuelle Encrenaz, J.-M. Ilié, Isabelle Mounier, Denis Poitrenaud, Sana Younes

Publication date 27 September 2012

Published in Formal Methods in System Design (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/s10703-011-0121-5

zbMATH Keywords

bounded model checkingcircuit robustness evaluationdependability analysissoft errorssymbolic model checking

Mathematics Subject Classification ID

Specification and verification (program logics, model checking, etc.) (68Q60) Fault detection; testing in circuits and networks (94C12)

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Cites work

• scientific article; zbMATH DE number 1670796 (Why is no real title available?)
• scientific article; zbMATH DE number 1315584 (Why is no real title available?)
• Automatic verification of finite-state concurrent systems using temporal logic specifications
• Self-stabilization
• Self-stabilizing systems in spite of distributed control

Cited in

(4)

• Not all bugs are created equal, but robust reachability can tell the difference
• Formal Analysis of Robustness at Model and Code Level
• scientific article; zbMATH DE number 7070744 (Why is no real title available?)
• Towards robustness analysis using PVS

Describes a project that uses

Uses Software

• sharpSAT

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