N latency 2N I/O‐bandwidth 2D‐array matrix multiplication algorithm
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Publication:4542827
DOI10.1108/03321640210423298zbMath1005.65043MaRDI QIDQ4542827
Abdelkrim Kamel Oudjida, S. Titr, M. Hamarlain
Publication date: 11 February 2003
Published in: COMPEL - The international journal for computation and mathematics in electrical and electronic engineering (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1108/03321640210423298
68W35: Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.)
65Y05: Parallel numerical computation
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